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allen18's avatar
allen18
Icon for Occasional Contributor rankOccasional Contributor
1 year ago

PCIe DMA transfer timeout

Hello， I am using quartus Pro 22.3 , device ( stratix10 1SX110HN2F43I2VG ) , IP core ( L-Tile and H-Tile Avalon Memory-mapped Intel FPGA IP for PCI Express 22.2.0 . When I use the DMA IP c...
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VenT_Altera's avatar
VenT_Altera
Icon for Frequent Contributor rankFrequent Contributor
1 year ago

Hi @allen18,


Thanks for attaching the files.


Could you please try to run the DMA test using S10 Dev Kit following the FPGA Wiki? This checks if the environment you are using is compatible with the example design.


Reference Design: Gen3x8 AVMM DMA - Stratix 10:

https://community.intel.com/t5/FPGA-Wiki/Reference-Design-Gen3x8-AVMM-DMA-Stratix-10/ta-p/735907


Another thing, since you're using a custom board, could you please confirm that the correct pin assignments have been made before compiling the project?


Thanks.

Best Regards,

Ven