Forum Discussion
Altera_Forum
Honored Contributor
13 years agoThe problem was solved.
I downloaded the .sof file to the board with reset switch in logic high position. The reset of the DE2 board is active low (see tutorial "Introduction to the Altera SOPC Builder Using VHDL Design"). We don't want the processor to reset, so we must keep the reset switch in high state. This solution has already been used by user sudattuladhar in this forum.