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Altera_Forum
Honored Contributor
Honored ContributorPattern detection question
I've been doing FPGA work for a while, but most of it has been in controls, not signal processing. I am trying to teach myself some of the basics, so I can take on a few of the more interesting side ...
Altera_ForumHonored Contributor
Honored ContributorYou might want to take a look at the MAC FIR topology:
http://www.xilinx.com/publications/archives/books/dsp.pdf You don't need an IP core to implement what you need. You just need two RAMs and a multiplier, and then a state machine to decide which 'lag' of the correlator you are working on. Check out the description of a lag correlator starting on page 8: http://www.ovro.caltech.edu/~dwh/wbsddc/correlator_efficiency.pdf Pattern detection is also done using LFSRs. Check out some of the references in this tutorial here: http://www.ovro.caltech.edu/~dwh/correlator/pdf/lfsr_tutorial.pdf Feel free to ask questions here on the forum, or send me an email (to my forum name). Cheers, Dave
