Honored Contributor
Honored ContributorI did this recently for cyclone iii so I will outline the steps. This is for parallel loading scheme.
- Convert SOF into a TTF and RBF and select the programming mode. TTF is a comma separated value text file. RBF is a raw binary file. I used rbf becuase it smaller file size and easier to work with in C/C++. - DRIVE DCLK LOW - DRIVE NCONFIG HIGH - DRIVE NCONFIG LOW - DRIVE NCONFIG HIGH - Sleep 1 ms (Delay to allow NSTATUS to pull high) - CONF_DONE should be LOW and NSTATUS shoud be high - For each byte in the rbf file, drive data to fpga data config inputs and pulse DCLK hi - While loading CONF_DONE should remain low / NSTATUS should remain high - After all bytes are loaded pulse DCLK a few extra times (read data book on device for specific extra clocking requirements ). - To verify config if complete/success verify CONF_DONE is high and NSTATUS is high. - Optionally cpu can monitor the NSTATUS pin for errors (Goes LOW), however it can be ignored util the end of loading the entire file to the part.
