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Altera_Forum's avatar
Altera_Forum
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10 years ago

Partial reconfiguration Time for a small block

Does any one have a handle on how long it might take to partially reconfig a small block in an ARRIA V FPGA. I would like to reconfig some LVDS drivers out of a design. In one revision I wo...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

because it isn't in the datasheet, or the user guide or the PR IP Core manual. There is no guidance at all.

Looks like you can't use the internal host in the ARRIAV anyway which rules it out for my design