Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorParrallel Flash Loader
We are thinking about having the following setup in our new board (see attached image for architecture). We want to do this to give use access to the fast parrallel programming capability of the parr...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- The PFI core itself has a tristated data output, and because I cannot access the internals I cannot build a second data arbiter outside the PFI at the top level. --- Quote End --- I don't exactly understand the problem. You can in fact parallel connect a second flash programming interface, utilizing the pfl_flash_access_request/pfl_flash_access_granted control lines. If pfl_flash_access_granted enables the respective flash signal buffers inside the MAX II design, it can work as a mux. Regarding PFL VJTAG, you have a basic documentation of the VJTAG protocol in a user manual. The PFL specific protocol isn't explicitely documented, but can be extracted from the PFL design. I agree however, that once you have the ARM flash access working, it can be used for factory programming as well.
