Altera_Forum
Honored Contributor
13 years agoparametrized bufif
Hi,
I would like to parametrized a module in verilog that will instantiate a "x" number of modules.. below is and example of what I am trying to do.. Could someone show me the right way of doing this.. you could edit the example below and send me the corrected module if you can.. module tri_stat_param #( parameter ffsize = 8 ) ( in, oe, out ); input oe; input [(ffsize-1):0] in; output [(ffsize-1):0] out; tri [(ffsize-1):0] out; bufif1 b1(out, in, oe); /* need to instantiate this keyword 'ffsize' */ endmodule