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Altera_Forum's avatar
Altera_Forum
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15 years ago

Overvoltage damage on JTAG/AS Interfaces

I have a custom board utilizing Stratix III devices. The programming interface schematics is attached.

During the board lifecycle I experienced several cases of damaged AS or JTAG interfaces, rendering the devices useless. I believe it all comes down to overvoltage on those interfaces. Browsing the Stratix III handbook, there's no suggestion on clamping diodes on either of those interfaces, while in the Cyclone III case, there IS such a suggestion. I do know for a fact, following a ticket submitted to Altera, that there is no internal protection on the Stratix III JTAG interface

I'm starting design of a new board, incorporating both Startix III and Arria IIGX devices, and I wonder what would be the best approach protecting programming interfaces on those valuable parts. We do use SignalTapII extensively so plug/unplug cycles of the USB-Blaster are very common.

Thanks in advance,

Amos

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    --- Quote Start ---

    I do know for a fact, following a ticket submitted to Altera, that there is no internal protection on the Stratix III JTAG interface

    --- Quote End ---

    Very simple, the I/O pin voltage maximum ratings are valid for the JTAG pins as well. In my opinion it's obvious, that they don't have additional internal protection.

    Unlike other connectors designed for hot-plug, e.g. USB, the 10 pin JTAG connector has no leading ground pin, so there's basically a high risk to apply an illegal voltage level to a signal pin, particularly if part of the equipment, e.g. a notebook is powered from a SMPS without protective earth connection.

    I can report, that I never observed a JTAG interface related device damage with boards, that utilize series resistors and schottky clamp diodes for the JTAG interface, even in a rough power electronics enviroment.
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Thanks FvM.

    Have you ever experienced damage to AS interface due to illegal voltage levels ?
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    You can assume identical voltage ratings for the FPGA pins. But I have changed all dedicated AS interfaces to indirect JTAG programming since years.