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Altera_Forum
Honored Contributor
Honored ContributorOutputting a clock
I have a Cyclone III FPGA. I want to output a clock, lets say a SCLK for SPI communication, from the FPGA to another device. Should I use a PLL output pin or can I just use a normal IO? The clock sig...
Altera_ForumHonored Contributor
Honored ContributorThe use of DDR to clock out is justified for very high speed.
SPI clocks are normally very slow and so any io will do
