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Altera_Forum
Honored Contributor
Honored ContributorOscillator through 1-to-1 PLL for clock
Hello, Our FPGA is supplied by an external oscillator. It's an integrated, stable oscillator (not just a crystal or a RC circuit), at 80 MHz. Is it considered a good engineering practice t...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- If your oscillator is of good quality (It sounds like your is) then you shouldn't need to route it through a PLL. If the Oscillator is also used to clock input/output signals from the FPGA then routing through a PLL may cause you timing issues where by the internal clock is momentarily out of phase with the external clock. --- Quote End --- Shouldn't this problem be addressed by the PLL's being zero-delay?
