On/Off led

The first thing to do is portmap correctly for both input and output of OnOff

I think I have corrected the portmap, but still nothing happens when I change the switch state.

-- main file
port (
                    Dselect : in std_logic; -- 24000000HZ
                         SW   : in   std_logic_vector(3 downto 0); 
                          KEY : in   std_logic_vector(3 downto 0); 
                         LEDR : out std_logic_vector(9 downto 0);
         HEX0, HEX1, HEX2, HEX3 : out std_logic_vector(0 to 6) --> Display_select 
      );
architecture Behavioral of test is
component leds is
                 port (
                        led_state : in std_logic_vector(1 downto 0);
                        LEDR : out std_logic_vector(9 downto 0)
                        );
        end component ;
signal Alarm_state : std_logic_vector(1 downto 0); --> 01,10,11
begin
process(Clock)
         begin
if (SW(2) = '1') then
                                if (hour = alarm_hour) then
                                    if (minute = alarm_minute) then
                                      alarm <= 1;
                                    end if;
                                Alarm_state <="01";
                            else
                                Alarm_state <="10";
                                 alarm <= 0;    
                                end if;
        end process;
test: leds port map (Alarm_state, LEDR); 
end Behavioral;
-- 
library IEEE;
use IEEE.std_logic_1164.all;
entity Leds is
    port (
            led_state : in std_logic_vector(1 downto 0);
            LEDR : out std_logic_vector(9 downto 0)
    );
end entity Leds;
architecture Behavioral of Leds is
 begin
    process(led_state)
    begin
         if(Clock'event and Clock='1') then
            if (led_state = "10") then
                LEDR(9) <= '1';
            end if;
            if (led_state = "01") then
                LEDR(9) <= '0';
            end if;
end if;
    end process;
end Behavioral;

Since your code is not complete, it is hard to tell about signals like hour/minute counters.

I have figured out what went wrong.

is the test a testbench or a synthesisable file? either way, you're not using the correct synchronous template for the process. You have clock in the sensitivity list but you're not using it in the process. This will lead to simulation/synthesis missmatch.

That is true Tricky. For issues like LEDs and human-finger triggered switches and similar starters' projects, I don't see any need for clock edge to sample changes. However it is useful to use correct methods at least to keep the professor happy.

True, but my point still stands. With the process sensitive to clock the similation will look like it's triggering on both clock edges, but on the real hardware its totally asynchronous.