Number of RUP, RDN pairs for SO-DIMM?

I believe the calibration block does what you stated below. I am not an expert in this. I spent tons of time trying to understand all of this when I did my board layout. Now that it is done and working, I don't remember the details. :-)

As far as calibrated vs non-calibrated, is there a reason why you do not want to use the 50 ohm with calibration?

If you have access to a simulation tool, you can run a simulation using the DDR model and see what margins you can tolerate. The slower clock means that you can tolerate some ringing due to Z mismatch, but... depending on your signal Tr and Tf and your trace lengths, the ringing, while it may not cause data errors, it may reduce your MTBF because of specs violations.

So, regardless of clock speed, make sure your impedances are matched - a simulation tool helps tremendously here.