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Altera_Forum
Honored Contributor
17 years agoNot operational : clock skew > data delay
I'm currrently doing a project on emulating a CPU functions. i've integrated various blocks of the CPU and during the compilation I received this warning: Warning: Circuit may not operate. De...
Altera_Forum
Honored Contributor
17 years agoHi,
One possible reason is that your clock is gated. If you have a gated clock you will need to avoid it from the start or else connect it to the global lines. kaz