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Altera_Forum
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11 years ago

NIOS Program store in DDR3 UNIPHY hanging when writing reading from other MPFE port

I'm using the DDR3 controller as my program store for the NIOS. I have two ports set up in the DDR3 controller with port 0 (the NIOS port) given priority. The second port is connected to a write and ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Just an update. I have been studying a reference design (http://www.alterawiki.com/wiki/reference_design_-_cyclone_v_hard_memory_controller_with_avalon_mm_data_width_expanded_for_user_ecc) but cannot see any differences in setup except that the reference design is not trying to use the DDR3 for the NIOS program store. I have a few running theories that I would appreciate if anyone could rule out.

1. The MPFE will not work for the NIOS program code store.

2. The MPFE does not work for bidirectional ports (Have attempted to rule out by separating the mSGDMA read and write ports as in reference design but no help)

3. The mSGDMA is constantly reading and writing and is never surrendering control to the NIOS. The mSGDMA writes and reads in park mode so is constantly writing and reading.

4. The MPFE does not support bursting (Have tried to rule out by disabling bursting and by reducing bursts from 64 to 4)

Appreciate any thoughts, I'm running out of ideas