Nios II to SRAM via Tri-State Bridge

Jake is rigth, all you need to do is

open your sopc builder project

chose menue FILE -> New component

change to TAB Signals

Button "Add Signal"

rename the new Signal clk

change its Interface to clock sink

add more new signals like adr, data, nrd nwr... choose interface avalo_tristate_slave

if your component has negative logik choose read_n otherwise read as signal type.

if you add your data interface, choose width to 16 and direction to bidir.

you should now have a minimum of

clock, data,adr,nrd,nwr,ncs

don't worry about the direction, it is from the components view so read is input (output from fpga)

change Signal Type to clk

change to Tab Interface

Button ADD INTERFACE

Change default type to "Avalon Memory Mapped Tristate Slave"

Setup your Timing according to your device datasheet, you can enter nSec as SOPC will take care about that.

now finish your component and feel free to use it

be aware of that you should check your avalon tristate bridge after adding this component about the shared signals

creating such a component is quit easy and done within a couple of minutes including reading datasheet ....