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SOLVED. For EPCS default bootloader you need to use mem_init and most importantly EPCS controller's clock input should be < 25Mhz.
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I'm still having problems booting my Nios II from an EPCS16 device. I thought reducing the EPCS flash controller clock might fix it but no. I think the clock reduction is still needed so it has been reduced from 72MHz to 12MHz. The Nios II core still runs at 72MHz - could this be a problem?
My system looks like this :-
EPCS_flash_controller located at 0x00100000; Nios II reset vector set to 0x00100000. There is 64kB of on-chip memory starting at 0x01010000 and the Nios II exception vector is set to 0x01010020. The Nios II program runs correctly when using the debugger so the code's ok.
I use these commands to generate the programming files
sof2flash --epcs --input=C3D.sof --output=C3D.flash
elf2flash --epcs --after=C3D.flash --input=C3D_comms.elf --output=C3D_comms.flash
nios2-elf-objcopy –input-target srec –output-target ihex C3D_comms.flash C3D_comms.hex
Next I use the Convert Programming File utility in Quartus II to combine the .sof and .hex into a .pof. The map file created looks ok with the .hex file starting from the next address after the end of the .sof. Looks like this
BLOCK START ADDRESS END ADDRESS
Page_0 0x00000000 0x00122F6B
C3D_comms.hex 0x00122F6C 0x00126E8B
Then I program the EPCS but when I try to run the program it fails.
Any help much appreciated.
Honored Contributor
