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Honored Contributor
Honored ContributorNIOS II and Cyclone III Remote Update
Have spent several days now searching and reading and think I am nearly there... but not quite. I am using the NIOS II core with SOPC builder. I use Quartus II for the FPGA image. This is a projec...
Altera_ForumHonored Contributor
Honored ContributorFrequency for remote update core is 25 MHz, at first register 0xC = 3, 0x4 = 0, after reconfig register 0xC = 8 and 0x4 = 8,
when I erase byte at address 0x400000, register 0xC = 0x400000, 0x4 = 0. In reality to read boot register which register do I have to read 0xC or 0x4 ?
