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Altera_Forum
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17 years ago

Newbie Help Request CPLD MAXII

Hi all. I want to build a digital clock, with several 7 segments displays (HH:mm:ss). How can i make the 1s clock to drive my 4bits counters? My board has a 50Mhz clock. How can i make 1s pre...
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Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

module clk1s (
    input           CLOCK_50,
    input           reset,
    output  reg     LED
);
localparam  COUNTDOWN = 49999999;
reg   count;
always @ (posedge CLOCK_50 or posedge reset)
    if(reset) begin
                count   <= COUNTDOWN;
                LED     <= 1'b0;
    end else begin
                count   <= count + {26{1'b1}};    // same as minus 1
        if(!count) begin 
                count   <= COUNTDOWN;
                LED     <= ~LED;
        end
    end
endmodule