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FPGAs are volatile devices - they require configuring every time they are powered on.
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Not all of them.
Actel and Lattice FPGAs are flash based rather than SRAM based so keep their configuration during a power cycle and are pretty much 'instant on'.
The downside is that they are slower and their tools are less mature than Altera/Xilinx's.
You can swap between Altera and Xilinx (and to a lesser extent Lattice) devices and they'll pretty much do what you expect. I had a world of
pain trying to re-target an Altera Cyclone III design (that wasn't particularly pushing any boundaries) to an Actel device. Luckily the client
changes his mind!
To allow an SRAM device to keep its configuration after a power cycle you need a configuration prom to provide the bitstream at power up.
Nial.
Honored Contributor
