Need Jtag Core for Stratix II

--- Quote Start ---

I am looking for a Jtag core in Verilog for ep2s60. Can anyone help? :)

--- Quote End ---

What exactly are you looking for in your "JTAG core"? The Stratix II supports the SLD_Virtual_JTAG core, the JTAG-to-Avalon-MM bridge, and other JTAG IP.

Cheers,

Dave

I need to read and write data to FPGA. I have done well with Cyclone IV GX, but I got difficulty with Stratix II. I have created a Jtag_uart, even used the example project came with the board, but I failed to connect to FPGA. There is something that I concern:

- Do FPGAs need to be "GX" family to transceive data?

- My board has an HM-Zd connector, but I do not have the HM-Zd loopback card to connect to it. Is that the reason I cannot transfer data from PC to the FPGA? :confused:

--- Quote Start ---

I need to read and write data to FPGA. I have done well with Cyclone IV GX, but I got difficulty with Stratix II. I have created a Jtag_uart, even used the example project came with the board, but I failed to connect to FPGA.

--- Quote End ---

I assume you have the JTAG cable connected, and have confirmed that you can download the FPGA, and maybe have confirmed that you can blink an LED so that you know your clock assignments are correct.

--- Quote Start ---

There is something that I concern:

- Do FPGAs need to be "GX" family to transceive data?

- My board has an HM-Zd connector, but I do not have the HM-Zd loopback card to connect to it. Is that the reason I cannot transfer data from PC to the FPGA? :confused:

--- Quote End ---

That is a different question, not related to JTAG.

Cheers,

Dave