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Altera_Forum
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10 years ago

Need help with a VIP design like the C5G example

Hi Guys, I put together simple LPDDR2+vip_vfr+vip_cpr+vip_itc system based on the C5G example for the StarterKit board. To keep the system simple I removed a number of IPs. Instead of th...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Do you have the correct timings including Vsync, hsync and blanking for your Output-Video-Setting? Why 970x720? This is not a standard format, is it?

Where is your Frame Reader connected? On-Chip-RAM?

Could you please add pictures in higher resolution of the QSYS-System and the configuration? It hard to read them...

The ColorPlaneSequencer is there to put either the from serial color-plane-transmission to parallel or reversed...