Forum Discussion
Altera_Forum
Honored Contributor
10 years agoNeed help with a VIP design like the C5G example
Hi Guys, I put together simple LPDDR2+vip_vfr+vip_cpr+vip_itc system based on the C5G example for the StarterKit board. To keep the system simple I removed a number of IPs. Instead of th...
Altera_Forum
Honored Contributor
10 years agoI added a PLL for the IPs. Now they all run at 120Mhz and the vip_itc output runs at 44.8 as is the master-bridge. I still have ONCHIP RAM
but I intend to switch to LPDDR. I can load patterns into RAM however, the only video I get is a blue screen after configuring/starting the Frame-Reader. How should I configure the frame reader given the number above? what is the formulae for configuring the registers? Thanks, S.