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Altera_Forum
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11 years ago

Need Help to Verify Timing Constraints On Output Pins to External Device

Hi, I'm relatively new in FPGA designing, so forgive me if my question seem simple. The project I am working on involves using a Cyclone V to control 4 external DDS chips (AD9915). So I'...
Altera_Forum's avatar
Altera_Forum
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11 years ago

Hi Rysc, (and Hi to Everybody else)

thanks for writing the TimeQuest User Guide. It is a great help.

I have a question about the set_clock_groups:

1) What if I put clocks asynchronous which are synchronous to each other?

2) Are there clocks that come from different sources which should not put asynchronous?