Forum Discussion
Altera_Forum
Honored Contributor
10 years ago --- Quote Start --- The screenshot is too small to see anything. --- Quote End --- thanks for reply in the first picture show that condition from R1: Reset Wait to R0: Reset Start reset with the condition " arbTimer >=resetDuration + RESET_WAIT " when I input the " + " in there, Quartus show another window which is send pic said " illegal verilog syntax found at character position 28, near + ". How do I fix that problem?