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boilerash's avatar
boilerash
Icon for New Contributor rankNew Contributor
5 years ago

N3000 simulation with SPD file error

I'm using Intel PAC N3000 provided hello_afu source code. I want to simulate this project with modelsim Intel FPGA edition. I try to use Quartus ➤Tools ➤ Generate Simulator Setup Script for IP to gen...
JonWay_C_Intel's avatar
JonWay_C_Intel
Icon for Frequent Contributor rankFrequent Contributor
5 years ago

You cannot use the Generate Simulator Setup Script for IP....this is not an IP.
ASE simulation is also not supported.

You can simulate each functional unit like any RTL simulation you perform on Quartus.