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Altera_Forum
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16 years ago

My first project with Altera and Quartus: FSK modulator/demodulator

Hi ! Today I started one small project to create one FSK (modulator and demodulator). In the next photo you can see the SCH of my modulator. The output are updated in every falling CLK of the ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

nevermind, it appeared later.

some of the code here may help you learn VHDL. i have never tried to port something directly from 7400 series to VHDL, but a direct port may not be as elegant as VHDL solution. counters and registers are very easy and flexible:

http://esd.cs.ucr.edu/labs/tutorial/