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Altera_Forum's avatar
Altera_Forum
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14 years ago

Multiple PWM on MAX II EPM240T100C5N for LED driving

Dear all,

I am considering using the EPM240 in my design to control 15 RGB LEDs with independent PWM for R,G,B and also read a few switches states (so, read some CPLD input pins).

The 15 RGB LEDs will require 45 different comparators for PWM, and I guess a single common counter could be used.

Ideally I wished everything was 16 bits, but 10bits is still acceptable.

I know the best to estimate if the code will fit in the CPLD would be to actually do it, but since it is probably quite easy for some of you to evaluate, I thought I would ask :)

I was thinking of having a giant shift register of 10*45 bits, but already just that, I am not sure the EPM240 can do ? Also, it would need to be latchable. So very close to a 74HC595.

Using SPI, the host processor would simultaneously shift the PWM comparator values out, and shift a few CPLD GPIO values in (for the buttons).

Could that fit in the EMP240 ?

How many LEs does a 8bits register take ? What about if it needs to be latchable ? Is it basically 1 LE per bit ?

How about the comparators ? the unique PWM counter will have to be compared with 45 comparators ...

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    --- Quote Start ---

    How many LEs does a 8bits register take ?

    What about if it needs to be latchable ?

    Is it basically 1 LE per bit ?

    --- Quote End ---

    - 8

    - another 8

    - yes

    --- Quote Start ---

    Could that fit in the EMP240 ?

    --- Quote End ---

    No, even if reducing resolution to 5 or 6 bit per LED channel.
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Thanks for your prompt reply FvM.

    I think I could get rid of the latches, the PWM comparators will not be valid during the bit shifting, but I can probably get away with that since it is a very short amount of time.

    Could you tell me how many LEs it takes to do a 8 bits comparator ? is it again 1 bit per LE or more complex ?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    The least resource requirement cant be expected comparing for equal and setting a register. Each LE has a 4-input LUT, one input for carry and three for data. So a 8 bit compare will need 5 or 6 LEs. The easiest way to understand the implementation is to compile a Quartus design and check the gate-level (post-mapping) netlist.