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New Contributor

5 years ago

multiple clocks from 1 pin dedicated clock

Hello everyone. In my board i have 3V3 oscillator connect wints pin clk0 of my cyc3 fpga. For example : Oscillator is 33mhz SG5032CAN here : https://fr.farnell.com/epson/x1g0044510006-sg5032can-...

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Super Contributor

5 years ago

There's no need to do this. Just enable a second PLL output and use it as a pass-through, matching the properties of the input clock.

fgh3982
New Contributor
5 years ago
Thank you Sstrell .

Please, can you give me a example shematic or where can i find an example ?

I allow myself to specify that it takes sources of clocks with 4 or 5 different frequencies

(frequencies ranging from 3 to 50 mhz)
One source (4 or 8 mhz ) will be connected to around 40 or more receiving functions.
The other clocks will be connected to about 20 receiver functions.

Regard .
- sstrell
  Super Contributor
  5 years ago
  I'm not sure I understand what you're saying. But what I'm saying is to go into the IP Parameter Editor for the PLL and enable additional clock outputs there. So you'd have the c0 like you have in the schematic but also a c1, which can be independently configured.
  - fgh3982
    New Contributor
    5 years ago
    Thank you.
    
    Apart from the clk0 leg of the FPGA , my design is in the FPGA .
    
    I try this example, but it does not work .
    
    I did not draw the functions that receive the clocks .
    
    Are there functions "like buffers" in Quartus to multiply the same signals ?
    
    Thanks again in advance .
    
    Regard .