multicycle path

Note that multicycles are not build around enabled registers. That is a common example, but by no means the only one. If you do use the enable, then the [get_fanouts...] is a good way to build multicycles off the enable:

http://www.altera.com/support/examples/timequest/exm-tq-clock-enable.html?gsa_pos=1&wt.oss_r=1&wt.oss=get_fanouts

And note that there are multiple ways to use this. For example:

set_multicycle_path -setup 2 -to [get_fanouts [get_pins enable_reg|q]]

set_multicycle_path -hold 1 -to [get_fanouts [get_pins enable_reg|q]]

This grabs all registers driven by that enable register and makes MCs to all of them, even if they come from full-rate registers. This is pretty common, where the transfer from the full-rate domain to the half-rate domain has data running at half-rate, so technically it's a MC.

Or you could just do it within the group. Using a variable:

set mc_group [get_fanouts [get_pins enable_reg|q]]

set_multicycle_path -setup 2 -from $mc_group -to $mc_group

set_multicycle_path -hold 1 -from $mc_group -to $mc_group

This only adds the MC if both source and destination registers are driven by the enable. There are other options, and they're all design dependent.

One thing with what I just wrote is that it also puts a MC on the enable register(the feedback path where the enable register feeds back on itself), which actually must meet the full-rate timing. Technically this will never fail timing since the fitter will always use a quick route(even when there's plenty of timing margin, the router tries to route things as quickly as possible to free up resources for other stuff). But if you wanted to, you could set this path back to the full-rate:

set_multicycle_path -setup 1 -from enable_reg -to enable_reg

set_multicycle_path -hold 0 -from enable_reg -to enable_reg

My example of the clock phase-shift would be -from [get_clocks clkA] -to [get_clocks clkB], i.e. between clock domains instead of between registers. In a case where the data is stable for multiple cycles, then the MC is between registers, as there is no control.