multicycle path

Kaz, good descritption, as clock enables are a good case for multicycles(I believe there's an example on the web on assigning MCs based on the clock enable). At a higher level, this scenario is when your design has a faster clock rate(say 200MHz), but some of the logic runs at only 100MHz. You can still drive that slower logic with the 200MHz clock and just enable every other clock cycle, effectively giving you 100MHz whose data can easily be transferred to/from the 200MHz since their driven by the same clock and have the same skew. The multicycles allows you to tell timing analysis to not time paths within the slower domain to 5ns but instead 10ns.

Another example is if the data rate is slower. It may even be off-chip, i.e. your data is coming in from a slow source and so you only get a new word every 4 clock cycles, or something like that. There are lots of other cases.

Tools could find most MCs, I believe. Fishtail is the one I've heard of, although I don't think it's main intention is for the clock enable scenario. That one should be pretty apparent that you've designed MC paths and you can add them in. Fishtail tends to find MC paths throughout your design that you didn't even realize were MCs.

And we're talking about a narrow set of MCs. They are ones that "expand the window" that your data transfers in. MCs really just change the edges of your clock used for setup and hold analysis. Another common case is shifting the window. For example, you have a 10ns clock feeding another 10ns clock that has a phase-shift of 500ps(let's say you did this phase-shift to help with I/O timing). The default setup relationship will be 500ps and the hold relationship will be -9.5ns. That means your data delay needs to be faster than 500ps, which is unlikely. In TimeQuest, if you add a MC -setup 2 -from clk10ns -to clk10n_phaseshifted, then you shift the window of analysis over by one cycle, so your setup relationship is 10.5ns and the hold relationship is 0.5ns. (It's not hard to visualize, but if you draw out the two waveforms it should make complete sense). In this case it's not a MC that is based on the logical behavior, but on the clocking relationship.

Those two cases cover 99% of all MCs.