Hi Alex
Thank you for responding,
Yes, data are registered in the I/O cell.
I'have checked, all connections are ok.
Below the corresponding sdc file lines and attached the sd specification, could you check if it is correct?
#create 50 mhz clock
create_clock -period 20 -name {c0_sd_clk} [get_ports {c0_sd_clk}]
# constraint of sd output delay time (fpga input)
set_input_delay -clock { c0_sd_clk } -add_delay 14 [get_ports {c0_sd_dat* c0_sd_cmd}]
# constraint of sd output hold time (fpga input)
set_input_delay -clock c0_sd_clk -min -rise 2.5 [get_ports c0_sd_dat* c0_sd_cmd]
# constraint of sd input setup time (fpga output)
set_output_delay -clock c0_sd_clk -max -rise 6 [get_ports c0_sd_dat* c0_sd_cmd]
# constraint of sd input hold time (fpga output)
set_output_delay -clock c0_sd_clk -min -rise 2 [get_ports c0_sd_dat* c0_sd_cmd] Regards,
Hery