multi case_sentence cause delay

thanks,FvM!

as a matter of fact,the 2 variants are equivalent,both 3 bits.

I trial and error some times,the outcome is the same.

code as follows the fmax is low.(clk=250M)

case(first_c)
3'd7:case(second_c)
          3'd7:express..
          3'd6:......
          3'd5:......
          3'd4:
          3'd3:
          3'd2:
          3'd1:
          3'd0:
       endcase
3'd6:case(second_c)
          3'd7:express..
          3'd6:......
          3'd5:......
          3'd4:
          3'd3:
          3'd2:
          3'd1:
          3'd0:
          endcase
3'd5:case(second_c)
          3'd7:express..
          3'd6:......
          3'd5:......
          3'd4:
          3'd3:
          3'd2:
          3'd1:
          3'd0:
          endcase
3'd4:case(second_c)
          3'd7:express..
          3'd6:......
          3'd5:......
          3'd4:
          3'd3:
          3'd2:
          3'd1:
          3'd0:
          endcase
3'd3:case(second_c)
          3'd7:express..
          3'd6:......
          3'd5:......
          3'd4:
          3'd3:
          3'd2:
          3'd1:
          3'd0:
          endcase
3'd2:case(second_c)
          3'd7:express..
          3'd6:......
          3'd5:......
          3'd4:
          3'd3:
          3'd2:
          3'd1:
          3'd0:
          endcase
3'd1:case(second_c)
          3'd7:express..
          3'd6:......
          3'd5:......
          3'd4:
          3'd3:
          3'd2:
          3'd1:
          3'd0:
          endcase
3'd0:case(second_c)
          3'd7:express..
          3'd6:......
          3'd5:......
          3'd4:
          3'd3:
          3'd2:
          3'd1:
          3'd0:
          endcase
endcase

codes as follows increases the fmax

case({first_c,second_c})
          {3'd7,3'd7}:expression..
          {3'd7,3'd6}:expression..
          .......
endcase

the other correlative logic is the same.