Modelsim: compiling into libraries

Very good...that was the problem...sorry, i'm a newer in VHDL and Modelsim :)

but now I've got another problem...the last one:

In one package, i've declared:

package log_package is

procedure log_write(level_i : in integer; from_i : in string; str_i : in string);

procedure log_write(level_i : in integer; from_i : in string; bus_command_i : in t_bus_command);

procedure log_write(level_i : in integer; from_i : in string; bus_result_i : in t_bus_result);

end log_package;

...

so three procedures with the same name, but different input parameters;

in my top I've written:

entity top is

...

end;

architecture arch_top of top is

...<signals>...

begin

...

myprocess : process

procedure writetestresult(test_name_i : in string; result_i : in boolean) is

begin

if result_i then

log_write(log_level_essential,instance_name,"passed " & test_name_i);

else

log_write(log_level_essential,instance_name,"failed " & test_name_i);

end if;

end procedure writetestresult;

begin

...

end process myprocess;

end arch_top;

Modelsim get me an error:

** Error: (vcom-1136) Unknown identifier "log_write".

Where am I going wrong?