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Altera_Forum's avatar
Altera_Forum
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10 years ago

Mixing 1.8v io and lvds in same bank in arria gx device

HI

I HAVE DESIGNED ONE PCB USING ARRIA GX FPGA WITH PART NO 5AGXBB7D4F40I5. I AM INTERFACING HIGH SPEED ADC TO BANK 4A,4B,4C,4D with ADC PART NO AD9463. THIS ADC HAS LVDS OUPUTS WHICH ARE INTERFACED TO BANK 4A,4B,4C,4D. IT HAS SOME SPI CONTROL SIGNAL WHICH ARE 1.8 V CMOS LEVEL COMPATIBLE AND ALSO INTERFACED TO SAME BANK. FOR BANK 4A,4B,4C,4D I HAVE SHORTED VCCIO TO 1.8V BECAUSE ADC IS 1.8V DEVICE AND I SET VCCPD OF BANK 4A,4B,4C,4D TO 2.5 FOR LVDS SUPPORT. CAN U PLEASE TELL ME IF IT IS ALRIGHT. CAN I MIX 1.8 IO AND LVDS IN SAME BANK 4A,B,C,D BY MAKING VCCIO=1.8 AND VCCPD=2.5 COMMON. WHEN I SIMULATED IN QUARTUS WITH PIN ASSIGNMENT I DID NOT GET ANY ERROR OR WARNING. PLEASE GUIDE ME AS PCB IS UNDER FABRICATION. THANK

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    10 years ago

    In my design, the FPGA is cyclone IV E. The VCCIO is =2.5V. And using ADG3308 to translate 2.5V to 1.8V.

    Also, I think the ADC should be AD9643. My design works well with AD9643.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    10 years ago

    Also, I want to use 5AGXFB7K4F40I3N of Arria GX. Do you have the schematic lib of Altium or Orcad early version the chip?

    In the Altera web, the OLB lib is too new to open.

    My email: jtliu@ouc.edu.cn .

    Thanks.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    10 years ago

    --- Quote Start ---

    Also, I want to use 5AGXFB7K4F40I3N of Arria GX. Do you have the schematic lib of Altium or Orcad early version the chip?

    In the Altera web, the OLB lib is too new to open.

    My email: jtliu@ouc.edu.cn .

    Thanks.

    --- Quote End ---

    Hi

    Please take the help of CAD designer to convert OLB lib to older version. In Orcad this facility is available.