Minimum pulse width violation

Look wat all signals you have assigned in default you have to assign some value in each and every case otherwise it will definately give a latch.

Example

always @ (x)

begin

case (x)

begin

s1: begin

a=1'b1; // 2 signals in s1

b=1'b1;

end

s2:

begin

a=1'b0; // 1 signal in s2

end

default:

a=1'b0;

b=1'b0; // 3signals in default

c=1'b0;

My reasoning is that each and every case should have eaqual signals which have been used or it will give a latch if even a single signal is unassigned in a case which has been assigned in other case.