Thanks Jake for the reply...
In my test design I am placing just a single ALTSYNCRAM component and there is nothing else there - the connections from this component are routing straight to the external device pins.
The test design is using C20 device to make it compile easily. From its compilation report I gather the design is using 38 M4K blocks instead of 36. I wrote about it in my original post. In the Resource Usage Summary I have:
M4Ks 38 / 52 ( 73 % )
Total block memory bits 153,600 / 239,616 ( 64 % )
Total block memory implementation bits 175,104 / 239,616 ( 73 % )
Not sure what exactly is the difference between these last two...
I have not tried your suggestion for 36 bits bus width yet.
Currently, I have a 16 bit processor driving this thing, and 4 data bit on the LCD, so to simplify the video sequencer I set the memory component to be 16 bit wide on the write port and 4 bits on the read port (simple dual port mode). I have also requested 153600 bits of memory, exactly as needed to have 2 pages 320x240 pixels each.