Forum Discussion
Altera_Forum
Honored Contributor
13 years agoYes a DMA can do what you are looking for. But I don't recommend using a PIO to send video offchip.
--- Quote Start --- You can't predict the rate at which the DMA will write pixels to the PIO. --- Quote End --- I am afraid this. --- Quote Start --- Instead have the DMA write pixels into a FIFO that has the read port sampled at a fixed rate so that the DAC will see a constant stream of pixels. --- Quote End --- i.e. i need in "Avalon-MM Write Slave to Avalon-MM Read Slave" configuration of FIFO? i.e. SOPC with inegrated VGA- controller can be realized as: (<sram>-Avalon MM-TS)-> (Avalon MM TM-<bridge to sram>-Avalon MM S )-> (Avalon MM M-<dma controller>-Avalon MM M)-> (Avalon MM S-<fifo>-Avalon MM S )-> (Avalon MM M-<my_master>-Avalon Conduit ) where MY_MASTER has a clock source calculated for video out, and not equal clock for any master (Nios). I think, I'm right:) Thank you, BadOmen!