Me and my simple questions: Can I do this in FPGA?

I wanted to consult one more thing to you guys, the Soft Core Nios II, would it be more easy to use this CPU for my purpose by programming a custom logic? In that case I'd use C language ,right? so in the end will be more easy?

rromano001 yes, i will start by programming as you said, regarding your questions

but now how large is image :

There is not actual image, I want to use a list of numbers, every number (binary) indicate a pixel intensity, I'm reducing everything to the clustering of a list of numbers, which can be 1000 numbers for example to be grouped in 3 clusters by calculating its membership value and centroids.

This is manage by loading only 1 number to a PE to do the calculation of the equation above. It will produce the first Uki and Vk (centroid), by communicating with the other clones PE it will update Vk and will calculate Uki again, and so on.

So, the difficult part here is to make the PE to perform Subtraction, Adding, Multiplication and Division of fractional numbers.

and how uki xi vk vl interact between them? As is in the equation.

and from where are coming inputs and where are going outputs?

I think I will use the memory of the development board to load a table with the 1000 numbers to be distributed to each PE, and output goes to the neighbor PE to the update, and when it finish to do clustering, it will load the results in memory I guess.