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Altera_Forum
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10 years ago

Me and my simple questions: Can I do this in FPGA?

Hi dear Altera friends. Sorry for the simple questions, i'm a beginner. My FPGA is DE1-SoC University, i'm learning how to use it. My question today is the following one: Until now, with t...
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Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

It has a single input and a single output.

But if the data rate is half the clock rate, you can mux the input between two sources.