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Altera_Forum
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10 years ago

Maximum Load of a DPCLK Pin of the MAX10

What is the maximum capacitive load which can be powered by a DPCLK output of a Max 10 Device? I want to use a 10M08SCE144C8G to power 4 ADC clock inputs with a capacitve load of 5pf for each ADC ...
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Altera_Forum
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10 years ago

I'm pretty sure Altera don't publish maximum loads. They only state performance figures based on particular loads - in the case of MAX 10, typically 5pf.

What I/O standard are you looking to drive? DPCLK won't let you drive certain differential signaling standards from it. In that respect it is no different to any other general purpose I/O pin. The DPCLK pins are intended to be used as a low latency control routes in to the device. If you're looking for higher performing clock output pins, look to the PLL_L_CLKOUT pins with lower latency from the PLLs.

Finally, I suspect you should be able to run a 20pF load at 20MHz. Just be careful with your routing if that's split over four destinations.

Cheers,

Alex