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Honored Contributor
Honored ContributorMaximum Frequency Input on Cyclone 3 device
Hi, I have to realise a frequency divisor from 320 MHz to 40 Mhz. I read from datasheet of cyclone 3 that maximum frequency input on clock pin (LVDS in single ended mode) is about 400MHz. Could yo...
Altera_ForumHonored Contributor
Honored ContributorOk,
Thanx for the reply. I'll do test and see the result. In Cyclone 3 device data sheet : .altera.com./literature./hb./cyc3./cyc3_ciii52001.pdf P21 Cyclone III Devices LVDS Receiver Timing Specifications They classify Max input clock frequency according to "Modes" *1, *2, *4, *7..... What is a Mode ? Is it a kind of protocol for LVDS transmittion ? Thx Remi
