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Altera_Forum
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8 years ago

MAX10 mixed VCCIO for configuration pins

Hi I am using a dual-supply MAX10 with banks 1a, 1b and 2 powered from 2.5 V and all remaining banks, including bank 8, from 3.3 V. I cannot find anything in the documentation suggesting that ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Thank you for your reply, it's useful to know we do not have a problem with our hardware design.

Not a big problem but for your information, unchecking the "Force VCCIO to be compatible with configuration I/O voltage" option in the device settings does not seem to suppress the warning when building the FPGA. For reference, we are using Quartus Prime Version 17.0.0 Build 595 04/25/2017 SJ Lite Edition.

Regards

Tim