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DamBam
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5 years ago

MAX10 JTAG Secure Design Example unlock

Hi, I'm struggling with a unlock instruction in mentioned example. The problem is that when I trigger unlock instruction the Quartus Programmer can't accces JTAG chain (Can't Porgram pof/sof, erase...
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DamBam
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5 years ago

Hi @NurAiman_M_Intel ,

Thank you for response.

Yes, I followed the instructions in the document, and the design worked as described in the document, I was able to run JAM file in quartus_jli. I observed that FPGA reconfigured when JTAG was unlocked, and didn't reconfigured when JTAG is locked.

But then, after triggering unlock (by pressing pushbutton), in Quartus Programmer (connected to JTAG I/O) I couldn't program a new SOF file to CRAM nor new POF to on-chip flash. I couldn't erase on-chip flash as well untill the power cycle is performed on the board.

After power cycle, and triggering unlock command (PB), I was able to program SOF, POF and erase.

I run this exmaple on terasIC DE10-Lite, the simulation was performed before hardware run, because I didn't wat to lock the devboard permanently.

Thanks, and looking forward to hear from you

DB