Forum Discussion
Hi,
1) using the software method can not be done fast, because there is no processor inside the design and therefore I had to write some HDL code for using the avalon bus of the dual config ip.
2) I have made the measurement. Yes, there is a problem, because the value of the pull-down resistor (as stated in the document) of 10k is to large, 2k2 or less should be used. Changing this, shows a voltage level of 0.4V or less during power on.
But unfortunately this will not change the behaviour always booting the CFM1.
3) I have created two different .sof files with diff. names. Both are valid and when written in the CFM1 they work correct.
4) In the pin-out file one can see:
~ALTERA_CONFIG_SEL~ / RESERVED_INPUT : 126 : input : 3.3-V LVCMOS : : 8 : N
which show to me that the Config-sel-pin is an input.
Remember that there is only a passive 2k2 resistor to ground connected to this pin.
Why I can see a 20us low puls aprox. 10ms after PON, and why the pin goes to 0V aprox. 20ms after PON?
Can this be a reason for the problem?
Thanks for help.