Honored Contributor
Honored ContributorHi,
--- Quote Start --- the temperature read from the internal sensor is garbage (the offset differs from board to board but is typically reporting 10 - 20 degrees C too low). The ADC is being clocked at 40 MHz from the onboard PLL, which is itself clocked from a 12 MHz source. I have tried disabling all channels except the TSD and this makes no difference and have also tried using a slower ADC clock and internal and external reference options all to no avail. --- Quote End --- To see huge diffrence in temperature reading, run board for longer time by utilizing most of the FPGA resourceor or by using test setup like ESS or simply using blower. --- Quote Start --- cannot find anything to suggest that I should not use 3.3 V for bank 8. Have I missed something? (FYI, bank 8 was moved to 3.3 V to make it easier to interface the configuration clear and done signals to a USB interface chip fitted to the new board.) --- Quote End --- It is based on your design kindly check example 3 & 4 in below link. https://www.altera.com/en_us/pdfs/literature/dp/max-10/pcg-01018.pdf Let me know if this has helped resolve the issue you are facing or if you need any further assistance. Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation)
