Altera_ForumHonored Contributor9 years agoMAX10 - SignalTap makes project not working Hi I have a custom board with MAX10 10M25SAE144I7G. When I try to add a lot of nodes (std_logic, and std_logic_vectors) and memory is almost full after compilation the project stops working. Signa...Show More
Altera_ForumHonored Contributor9 years agoDo you set timing constraints on the clk? Check the maximum freq of the clock of the design.
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