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- Altera_Forum
Honored Contributor
Simply assume, that MAX V is identical to MAX II in all relevant parameters.
I didn't see a statement in both device handbooks about configuration integrity check, e.g. by a CRC. You should ask Altera about it. If the configuration bitstream is checked during power-up only, the test may be considered insufficient, because the configuration could be changed by a soft error at any time later. Thus for a reliable consistency check, you would want a periodical CRC check as available with other Altera FPGA.