Max V Extending JTAG?

Supplemental: After temporarily enabling the Telemetry/feedback I have managed to look closer at the official JTAG megafunctions.

1. The megafunction named sld_virtual_jtag_basic seems non-functional, all it does is make Quatus optimize away anything connected to it.

2. The megafunction named sld_virtual_jtag is lean itself, but triggers the inclusion of the sld_hub megafunction, which uses about 80+ LEs, causing a minimum device of 5M160ZE64C5. A lot of that seems to be wasted on one-hot state machines and maybe a non-optimized shadow IR register implementation, there are even messages in Quatus itself about how it could be done better! (look in the compilation report under Analysis & Synthesis, Optimization Results, Multiplexer Statistics, Multiplexer Restructuring Statistics).

3. From some early experiments, I seem to be able to implement the needed sld_hub subset in less than 30 LEs, and I haven't optimized it yet, but this should at least allow me to go from 5M160ZE64C5 to 5M80ZE64C5 (I need room for the main functionality too).

4. The sld_hub ultimately connects to a dedicated hardware "atom" near the UFM (according to the chip planner and netlist viewer). This is named "altera_internal_jtag" and has 4 pins connected to the physical JTAG pins and 4 pins with similar names for the JTAG stuff in logic blocks.

# 4 ("altera_internal_jtag" atom in Max V devices) is what I was looking for, but I still don't know how to invoke it directly, e.g. as a VHDL component or by some other means.