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Altera_Forum
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19 years ago

Max speed of capture of analog data

Hello! What Max speed of capture of analog data we can achieve using Altera FPGA devices? Digitized data will be stored in memory and then to be transferred through PCI-E. What max bandwidth o...
Altera_Forum's avatar
Altera_Forum
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19 years ago

Hi,

for your first question, it depends on the ADC that you choose. The FPGA doesn't have a built in ADC. (although there are some ideas regarding using the SSTL-type input with a VREF to act as a comparator, and then vary the VREF to find the signal level.)

The FPGA's inputs can handle any ADC that I know of. Some newer ADCs (like from Analog Devices) use LVDS outputs, and Altera FPGAs can take up to 1000 mbps on the LVDS inputs. So that won't be your limiting factor.

Altera has a reference design showing the use of PCIe and DDR2 memory on the Altera PCIe dev kit board. Check it out here:

http://www.altera.com/end-markets/refdesigns/sys-sol/indust_mil/ref-pciexpress-ddr2-sdram.html

have fun!

Gregor