Forum Discussion
Altera_Forum
Honored Contributor
15 years agoDoes the I2C master keep an I2C speed of 100 kHz and the other related timing requirements? The UFM-I2C interface is designed as synchronous logic clocked by the MAX II internal oscillator, which isn't very fast, it may have problems if the I2C interface is operated beyond the basic specification. I didn't yet use the I2C interface and am not aware of possible bugs. But the complete interface logic is present as HDL text in the I2C component file, you can review it and check it's operation in a simulation.